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base repository: m-labs/misoc
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head repository: m-labs/misoc
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compare: 84b631c9296b
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Mar 19, 2015

  1. Copy the full SHA
    6bdf605 View commit details
  2. liteeth/mac/core: add with_padding option (enabled by default) and ch…

    …ange with_hw_preamble_crc option to with_preamble_crc
    enjoy-digital committed Mar 19, 2015
    Copy the full SHA
    84b631c View commit details
Showing with 15 additions and 11 deletions.
  1. +14 −10 misoclib/com/liteeth/mac/core/__init__.py
  2. +1 −1 software/libnet/microudp.c
24 changes: 14 additions & 10 deletions misoclib/com/liteeth/mac/core/__init__.py
Original file line number Diff line number Diff line change
@@ -4,7 +4,9 @@
from misoclib.com.liteeth.phy.sim import LiteEthPHYSim

class LiteEthMACCore(Module, AutoCSR):
def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
def __init__(self, phy, dw, endianness="big",
with_preamble_crc=True,
with_padding=True):
if dw < phy.dw:
raise ValueError("Core data width({}) must be larger than PHY data width({})".format(dw, phy.dw))

@@ -24,8 +26,9 @@ def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
if isinstance(phy, LiteEthPHYSim):
# In simulation, avoid CRC/Preamble to enable direct connection
# to the Ethernet tap.
self._hw_preamble_crc = CSRStatus(reset=1)
elif with_hw_preamble_crc:
self._preamble_crc = CSRStatus(reset=1)
elif with_preamble_crc:
self._preamble_crc = CSRStatus(reset=1)
# Preamble insert/check
preamble_inserter = preamble.LiteEthMACPreambleInserter(phy.dw)
preamble_checker = preamble.LiteEthMACPreambleChecker(phy.dw)
@@ -42,13 +45,14 @@ def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
rx_pipeline += [preamble_checker, crc32_checker]

# Padding
padding_inserter = padding.LiteEthMACPaddingInserter(phy.dw, 60)
padding_checker = padding.LiteEthMACPaddingChecker(phy.dw, 60)
self.submodules += RenameClockDomains(padding_inserter, "eth_tx")
self.submodules += RenameClockDomains(padding_checker, "eth_rx")

tx_pipeline += [padding_inserter]
rx_pipeline += [padding_checker]
if with_padding:
padding_inserter = padding.LiteEthMACPaddingInserter(phy.dw, 60)
padding_checker = padding.LiteEthMACPaddingChecker(phy.dw, 60)
self.submodules += RenameClockDomains(padding_inserter, "eth_tx")
self.submodules += RenameClockDomains(padding_checker, "eth_rx")

tx_pipeline += [padding_inserter]
rx_pipeline += [padding_checker]

# Delimiters
if dw != 8:
2 changes: 1 addition & 1 deletion software/libnet/microudp.c
Original file line number Diff line number Diff line change
@@ -12,7 +12,7 @@
#define ETHERTYPE_ARP 0x0806
#define ETHERTYPE_IP 0x0800

#ifdef CSR_ETHMAC_HW_PREAMBLE_CRC_ADDR
#ifdef CSR_ETHMAC_PREAMBLE_CRC_ADDR
#define HW_PREAMBLE_CRC
#endif