targets/kc705: rename sdram_module to sdram_modules to reflect that w…

…e have 8 modules sharing the same characteristics
m-labs · Mar 21, 2015 · 1c0e306 · 1c0e306
1 parent 854058a
commit 1c0e306
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/targets/kc705.py b/targets/kc705.py
@@ -84,14 +84,14 @@ def __init__(self, platform, **kwargs):
 		self.submodules.crg = _CRG(platform)
 
 		if not self.with_main_ram:
-			sdram_module = MT8JTF12864(self.clk_freq)
+			sdram_modules = MT8JTF12864(self.clk_freq)
 			sdram_controller_settings = sdram.ControllerSettings(
 				req_queue_size=8,
 				read_time=32,
 				write_time=16
 			)
 			self.submodules.ddrphy = k7ddrphy.K7DDRPHY(platform.request("ddram"), memtype="DDR3")
-			self.register_sdram_phy(self.ddrphy, sdram_module.geom_settings, sdram_module.timing_settings,
+			self.register_sdram_phy(self.ddrphy, sdram_modules.geom_settings, sdram_modules.timing_settings,
 				sdram_controller_settings)
 
 		spiflash_pads = platform.request("spiflash")