Skip to content

Commit 293a62d

Browse files
author
Sebastien Bourdeauducq
committedNov 29, 2012
Replace Signal(bits_for(... with Signal(max=...
1 parent 8bf6945 commit 293a62d

File tree

3 files changed

+5
-5
lines changed

3 files changed

+5
-5
lines changed
 

Diff for: ‎milkymist/asmicon/bankmachine.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ def __init__(self, slicer, bankn, slots):
4242
self.nslots = len(self.slots)
4343
self.stb = Signal()
4444
self.ack = Signal()
45-
self.tag = Signal(bits_for(self.nslots-1))
45+
self.tag = Signal(max=self.nslots)
4646
self.adr = Signal(self.slots[0].adr.nbits)
4747
self.we = Signal()
4848

@@ -238,7 +238,7 @@ def get_fragment(self):
238238
# Respect write-to-precharge specification
239239
precharge_ok = Signal()
240240
t_unsafe_precharge = 2 + self.timing_settings.tWR - 1
241-
unsafe_precharge_count = Signal(bits_for(t_unsafe_precharge))
241+
unsafe_precharge_count = Signal(max=t_unsafe_precharge+1)
242242
comb.append(precharge_ok.eq(unsafe_precharge_count == 0))
243243
sync += [
244244
If(self.cmd.stb & self.cmd.ack & self.cmd.is_write,

Diff for: ‎milkymist/asmicon/multiplexer.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ def __init__(self, commands, dfi):
6464

6565
ncmd = len(self.commands)
6666
nph = len(self.dfi.phases)
67-
self.sel = [Signal(bits_for(ncmd-1)) for i in range(nph)]
67+
self.sel = [Signal(max=ncmd) for i in range(nph)]
6868

6969
def get_fragment(self):
7070
comb = []
@@ -194,7 +194,7 @@ def anti_starvation(timeout):
194194
max_time = Signal()
195195
if timeout:
196196
t = timeout - 1
197-
time = Signal(bits_for(t))
197+
time = Signal(max=t+1)
198198
comb.append(max_time.eq(time == 0))
199199
sync.append(
200200
If(~en,

Diff for: ‎milkymist/asmicon/refresher.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ def get_fragment(self):
4545
])
4646

4747
# Periodic refresh counter
48-
counter = Signal(bits_for(self.tREFI - 1))
48+
counter = Signal(max=self.tREFI)
4949
start = Signal()
5050
sync += [
5151
start.eq(0),

0 commit comments

Comments
 (0)
Please sign in to comment.