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Commit 5931c5e

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author
Sebastien Bourdeauducq
committedSep 10, 2012
Basic support for new clock domain and instance API
1 parent 42d5e85 commit 5931c5e

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6 files changed

+138
-154
lines changed

6 files changed

+138
-154
lines changed
 

‎milkymist/framebuffer/__init__.py

+20-25
Original file line numberDiff line numberDiff line change
@@ -172,37 +172,32 @@ def __init__(self):
172172
def get_fragment(self):
173173
data_width = 2+3*_bpc_dac
174174
asfifo = Instance("asfifo",
175-
[
176-
("data_out", BV(data_width)),
177-
("empty", BV(1)),
178-
179-
("full", BV(1))
180-
], [
181-
("read_en", BV(1)),
182-
("clk_read", self.vga_clk),
183-
184-
("data_in", BV(data_width)),
185-
("write_en", BV(1)),
186-
187-
("rst", BV(1))
188-
],
189-
parameters=[
190-
("data_width", data_width),
191-
("address_width", 8)
192-
],
193-
clkport="clk_write")
175+
Instance.Parameter("data_width", data_width),
176+
Instance.Parameter("address_width", 8),
177+
178+
Instance.Output("data_out", BV(data_width)),
179+
Instance.Output("empty", BV(1)),
180+
Instance.Input("read_en", BV(1)),
181+
Instance.Input("clk_read", self.vga_clk),
182+
183+
Instance.Input("data_in", BV(data_width)),
184+
Instance.Output("full", BV(1)),
185+
Instance.Input("write_en", BV(1)),
186+
Instance.ClockPort("clk_write"),
187+
188+
Instance.Input("rst", BV(1)))
194189
t = self.token("dac")
195190
return Fragment(
196191
[
197-
asfifo.ins["read_en"].eq(1),
198-
Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"]),
192+
asfifo.get_io("read_en").eq(1),
193+
Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.get_io("data_out")),
199194

200-
self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
201-
asfifo.ins["write_en"].eq(self.endpoints["dac"].stb),
202-
asfifo.ins["data_in"].eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)),
195+
self.endpoints["dac"].ack.eq(~asfifo.get_io("full")),
196+
asfifo.get_io("write_en").eq(self.endpoints["dac"].stb),
197+
asfifo.get_io("data_in").eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)),
203198

204199
self.busy.eq(0),
205-
asfifo.ins["rst"].eq(0)
200+
asfifo.get_io("rst").eq(0)
206201
],
207202
instances=[asfifo])
208203

‎milkymist/lm32/__init__.py

+35-34
Original file line numberDiff line numberDiff line change
@@ -8,44 +8,45 @@ def __init__(self):
88
self.interrupt = Signal(BV(32))
99
self.ext_break = Signal()
1010
self._inst = Instance("lm32_top",
11-
[("I_ADR_O", BV(32)),
12-
("I_DAT_O", i.dat_w),
13-
("I_SEL_O", i.sel),
14-
("I_CYC_O", i.cyc),
15-
("I_STB_O", i.stb),
16-
("I_WE_O", i.we),
17-
("I_CTI_O", i.cti),
18-
("I_LOCK_O", BV(1)),
19-
("I_BTE_O", i.bte),
20-
("D_ADR_O", BV(32)),
21-
("D_DAT_O", d.dat_w),
22-
("D_SEL_O", d.sel),
23-
("D_CYC_O", d.cyc),
24-
("D_STB_O", d.stb),
25-
("D_WE_O", d.we),
26-
("D_CTI_O", d.cti),
27-
("D_LOCK_O", BV(1)),
28-
("D_BTE_O", d.bte)],
11+
Instance.ClockPort("clk_i"),
12+
Instance.ResetPort("rst_i"),
2913

30-
[("interrupt", self.interrupt),
31-
#("ext_break", self.ext_break),
32-
("I_DAT_I", i.dat_r),
33-
("I_ACK_I", i.ack),
34-
("I_ERR_I", i.err),
35-
("I_RTY_I", BV(1)),
36-
("D_DAT_I", d.dat_r),
37-
("D_ACK_I", d.ack),
38-
("D_ERR_I", d.err),
39-
("D_RTY_I", BV(1))],
14+
Instance.Input("interrupt", self.interrupt),
15+
#Instance.Input("ext_break", self.ext_break),
16+
17+
Instance.Output("I_ADR_O", BV(32)),
18+
Instance.Output("I_DAT_O", i.dat_w),
19+
Instance.Output("I_SEL_O", i.sel),
20+
Instance.Output("I_CYC_O", i.cyc),
21+
Instance.Output("I_STB_O", i.stb),
22+
Instance.Output("I_WE_O", i.we),
23+
Instance.Output("I_CTI_O", i.cti),
24+
Instance.Output("I_LOCK_O", BV(1)),
25+
Instance.Output("I_BTE_O", i.bte),
26+
Instance.Input("I_DAT_I", i.dat_r),
27+
Instance.Input("I_ACK_I", i.ack),
28+
Instance.Input("I_ERR_I", i.err),
29+
Instance.Input("I_RTY_I", BV(1)),
4030

41-
clkport="clk_i",
42-
rstport="rst_i")
31+
Instance.Output("D_ADR_O", BV(32)),
32+
Instance.Output("D_DAT_O", d.dat_w),
33+
Instance.Output("D_SEL_O", d.sel),
34+
Instance.Output("D_CYC_O", d.cyc),
35+
Instance.Output("D_STB_O", d.stb),
36+
Instance.Output("D_WE_O", d.we),
37+
Instance.Output("D_CTI_O", d.cti),
38+
Instance.Output("D_LOCK_O", BV(1)),
39+
Instance.Output("D_BTE_O", d.bte),
40+
Instance.Input("D_DAT_I", d.dat_r),
41+
Instance.Input("D_ACK_I", d.ack),
42+
Instance.Input("D_ERR_I", d.err),
43+
Instance.Input("D_RTY_I", BV(1)))
4344

4445
def get_fragment(self):
4546
comb = [
46-
self._inst.ins["I_RTY_I"].eq(0),
47-
self._inst.ins["D_RTY_I"].eq(0),
48-
self.ibus.adr.eq(self._inst.outs["I_ADR_O"][2:]),
49-
self.dbus.adr.eq(self._inst.outs["D_ADR_O"][2:])
47+
self._inst.get_io("I_RTY_I").eq(0),
48+
self._inst.get_io("D_RTY_I").eq(0),
49+
self.ibus.adr.eq(self._inst.get_io("I_ADR_O")[2:]),
50+
self.dbus.adr.eq(self._inst.get_io("D_ADR_O")[2:])
5051
]
5152
return Fragment(comb=comb, instances=[self._inst])

‎milkymist/m1crg/__init__.py

+19-19
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,23 @@ def __init__(self, infreq, outfreq1x):
77
self.clkin = Signal()
88
self.trigger_reset = Signal()
99

10-
generated = []
10+
self.cd_sys = ClockDomain("sys")
11+
12+
ratio = Fraction(outfreq1x)/Fraction(infreq)
13+
in_period = float(Fraction(1000000000)/Fraction(infreq))
14+
15+
inst_items = [
16+
Instance.Parameter("in_period", in_period),
17+
Instance.Parameter("f_mult", ratio.numerator),
18+
Instance.Parameter("f_div", ratio.denominator),
19+
Instance.Input("clkin", self.clkin),
20+
Instance.Input("trigger_reset", self.trigger_reset),
21+
22+
Instance.Output("sys_clk", self.cd_sys.clk),
23+
Instance.Output("sys_rst", self.cd_sys.rst)
24+
]
25+
1126
for name in [
12-
"sys_clk",
13-
"sys_rst",
1427
"ac97_rst_n",
1528
"videoin_rst_n",
1629
"flash_rst_n",
@@ -25,23 +38,10 @@ def __init__(self, infreq, outfreq1x):
2538
]:
2639
s = Signal(name=name)
2740
setattr(self, name, s)
28-
generated.append((name, s))
41+
inst_items.append(Instance.Output(name, s))
2942

30-
ratio = Fraction(outfreq1x)/Fraction(infreq)
31-
in_period = float(Fraction(1000000000)/Fraction(infreq))
32-
33-
self._inst = Instance("m1crg",
34-
generated,
35-
[
36-
("clkin", self.clkin),
37-
("trigger_reset", self.trigger_reset)
38-
],
39-
parameters=[
40-
("in_period", in_period),
41-
("f_mult", ratio.numerator),
42-
("f_div", ratio.denominator)
43-
]
44-
)
43+
self._inst = Instance("m1crg", *inst_items)
44+
4545

4646
def get_fragment(self):
4747
return Fragment(instances=[self._inst])

‎milkymist/minimac3/__init__.py

+33-39
Original file line numberDiff line numberDiff line change
@@ -61,45 +61,39 @@ def get_fragment(self):
6161
]
6262
inst = [
6363
Instance("minimac3",
64-
[
65-
("rx_done_0", self._rx_event_0.trigger),
66-
("rx_count_0", self._rx_count_0.field.w),
67-
("rx_done_1", self._rx_event_1.trigger),
68-
("rx_count_1", self._rx_count_1.field.w),
69-
70-
("tx_done", self._tx_event.trigger),
71-
72-
("wb_dat_o", self.membus.dat_r),
73-
("wb_ack_o", self.membus.ack),
74-
75-
("phy_tx_data", self.phy_tx_data),
76-
("phy_tx_en", self.phy_tx_en),
77-
("phy_tx_er", self.phy_tx_er),
78-
], [
79-
("rx_ready_0", rx_ready_0),
80-
("rx_ready_1", rx_ready_1),
81-
82-
("tx_start", self._tx_start.re),
83-
("tx_count", self._tx_count.field.r),
84-
85-
("wb_adr_i", self.membus.adr),
86-
("wb_dat_i", self.membus.dat_w),
87-
("wb_sel_i", self.membus.sel),
88-
("wb_stb_i", self.membus.stb),
89-
("wb_cyc_i", self.membus.cyc),
90-
("wb_we_i", self.membus.we),
91-
92-
("phy_tx_clk", self.phy_tx_clk),
93-
("phy_rx_clk", self.phy_rx_clk),
94-
("phy_rx_data", self.phy_rx_data),
95-
("phy_dv", self.phy_dv),
96-
("phy_rx_er", self.phy_rx_er),
97-
("phy_col", self.phy_col),
98-
("phy_crs", self.phy_crs)
99-
],
100-
clkport="sys_clk",
101-
rstport="sys_rst"
102-
)
64+
Instance.ClockPort("sys_clk"),
65+
Instance.ResetPort("sys_rst"),
66+
67+
Instance.Output("rx_done_0", self._rx_event_0.trigger),
68+
Instance.Output("rx_count_0", self._rx_count_0.field.w),
69+
Instance.Output("rx_done_1", self._rx_event_1.trigger),
70+
Instance.Output("rx_count_1", self._rx_count_1.field.w),
71+
Instance.Input("rx_ready_0", rx_ready_0),
72+
Instance.Input("rx_ready_1", rx_ready_1),
73+
74+
Instance.Input("tx_start", self._tx_start.re),
75+
Instance.Input("tx_count", self._tx_count.field.r),
76+
Instance.Output("tx_done", self._tx_event.trigger),
77+
78+
Instance.Input("wb_adr_i", self.membus.adr),
79+
Instance.Input("wb_dat_i", self.membus.dat_w),
80+
Instance.Input("wb_sel_i", self.membus.sel),
81+
Instance.Input("wb_stb_i", self.membus.stb),
82+
Instance.Input("wb_cyc_i", self.membus.cyc),
83+
Instance.Input("wb_we_i", self.membus.we),
84+
Instance.Output("wb_dat_o", self.membus.dat_r),
85+
Instance.Output("wb_ack_o", self.membus.ack),
86+
87+
Instance.Output("phy_tx_data", self.phy_tx_data),
88+
Instance.Output("phy_tx_en", self.phy_tx_en),
89+
Instance.Output("phy_tx_er", self.phy_tx_er),
90+
Instance.Input("phy_tx_clk", self.phy_tx_clk),
91+
Instance.Input("phy_rx_clk", self.phy_rx_clk),
92+
Instance.Input("phy_rx_data", self.phy_rx_data),
93+
Instance.Input("phy_dv", self.phy_dv),
94+
Instance.Input("phy_rx_er", self.phy_rx_er),
95+
Instance.Input("phy_col", self.phy_col),
96+
Instance.Input("phy_crs", self.phy_crs))
10397
]
10498
return Fragment(comb, sync, instances=inst) \
10599
+ self.events.get_fragment() \

‎milkymist/s6ddrphy/__init__.py

+30-35
Original file line numberDiff line numberDiff line change
@@ -3,49 +3,44 @@
33

44
class S6DDRPHY:
55
def __init__(self, a, ba, d):
6-
ins = []
7-
outs = []
8-
inouts = []
9-
10-
for name, width, l in [
11-
("clk2x_270", 1, ins),
12-
("clk4x_wr", 1, ins),
13-
("clk4x_wr_strb", 1, ins),
14-
("clk4x_rd", 1, ins),
15-
("clk4x_rd_strb", 1, ins),
6+
inst_items = [
7+
Instance.Parameter("NUM_AD", a),
8+
Instance.Parameter("NUM_BA", ba),
9+
Instance.Parameter("NUM_D", d),
10+
Instance.ClockPort("sys_clk")
11+
]
12+
for name, width, cl in [
13+
("clk2x_270", 1, Instance.Input),
14+
("clk4x_wr", 1, Instance.Input),
15+
("clk4x_wr_strb", 1, Instance.Input),
16+
("clk4x_rd", 1, Instance.Input),
17+
("clk4x_rd_strb", 1, Instance.Input),
1618

17-
("sd_clk_out_p", 1, outs),
18-
("sd_clk_out_n", 1, outs),
19-
("sd_a", a, outs),
20-
("sd_ba", ba, outs),
21-
("sd_cs_n", 1, outs),
22-
("sd_cke", 1, outs),
23-
("sd_ras_n", 1, outs),
24-
("sd_cas_n", 1, outs),
25-
("sd_we_n", 1, outs),
26-
("sd_dq", d//2, inouts),
27-
("sd_dm", d//16, outs),
28-
("sd_dqs", d//16, inouts)
19+
("sd_clk_out_p", 1, Instance.Output),
20+
("sd_clk_out_n", 1, Instance.Output),
21+
("sd_a", a, Instance.Output),
22+
("sd_ba", ba, Instance.Output),
23+
("sd_cs_n", 1, Instance.Output),
24+
("sd_cke", 1, Instance.Output),
25+
("sd_ras_n", 1, Instance.Output),
26+
("sd_cas_n", 1, Instance.Output),
27+
("sd_we_n", 1, Instance.Output),
28+
("sd_dq", d//2, Instance.InOut),
29+
("sd_dm", d//16, Instance.Output),
30+
("sd_dqs", d//16, Instance.InOut)
2931

3032
]:
3133
s = Signal(BV(width), name=name)
3234
setattr(self, name, s)
33-
l.append((name, s))
35+
inst_items.append(cl(name, s))
3436

3537
self.dfi = dfi.Interface(a, ba, d, 2)
36-
ins += self.dfi.get_standard_names(True, False)
37-
outs += self.dfi.get_standard_names(False, True)
38+
inst_items += [Instance.Input(name, signal)
39+
for name, signal in self.dfi.get_standard_names(True, False)]
40+
inst_items += [Instance.Output(name, signal)
41+
for name, signal in self.dfi.get_standard_names(False, True)]
3842

39-
self._inst = Instance("s6ddrphy",
40-
outs,
41-
ins,
42-
inouts,
43-
[
44-
("NUM_AD", a),
45-
("NUM_BA", ba),
46-
("NUM_D", d)
47-
],
48-
clkport="sys_clk")
43+
self._inst = Instance("s6ddrphy", *inst_items)
4944

5045
def get_fragment(self):
5146
return Fragment(instances=[self._inst])

‎top.py

+1-2
Original file line numberDiff line numberDiff line change
@@ -160,8 +160,7 @@ def get():
160160
src_verilog, vns = verilog.convert(frag,
161161
cst.get_ios(),
162162
name="soc",
163-
clk_signal=crg0.sys_clk,
164-
rst_signal=crg0.sys_rst,
163+
clock_domains={"sys": crg0.cd_sys},
165164
return_ns=True)
166165
src_ucf = cst.get_ucf(vns)
167166
return (src_verilog, src_ucf)

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