@@ -61,45 +61,39 @@ def get_fragment(self):
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]
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inst = [
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Instance ("minimac3" ,
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- [
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- ("rx_done_0" , self ._rx_event_0 .trigger ),
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- ("rx_count_0" , self ._rx_count_0 .field .w ),
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- ("rx_done_1" , self ._rx_event_1 .trigger ),
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- ("rx_count_1" , self ._rx_count_1 .field .w ),
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-
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- ("tx_done" , self ._tx_event .trigger ),
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-
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- ("wb_dat_o" , self .membus .dat_r ),
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- ("wb_ack_o" , self .membus .ack ),
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-
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- ("phy_tx_data" , self .phy_tx_data ),
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- ("phy_tx_en" , self .phy_tx_en ),
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- ("phy_tx_er" , self .phy_tx_er ),
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- ], [
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- ("rx_ready_0" , rx_ready_0 ),
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- ("rx_ready_1" , rx_ready_1 ),
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-
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- ("tx_start" , self ._tx_start .re ),
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- ("tx_count" , self ._tx_count .field .r ),
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-
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- ("wb_adr_i" , self .membus .adr ),
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- ("wb_dat_i" , self .membus .dat_w ),
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- ("wb_sel_i" , self .membus .sel ),
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- ("wb_stb_i" , self .membus .stb ),
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- ("wb_cyc_i" , self .membus .cyc ),
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- ("wb_we_i" , self .membus .we ),
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-
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- ("phy_tx_clk" , self .phy_tx_clk ),
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- ("phy_rx_clk" , self .phy_rx_clk ),
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- ("phy_rx_data" , self .phy_rx_data ),
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- ("phy_dv" , self .phy_dv ),
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- ("phy_rx_er" , self .phy_rx_er ),
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- ("phy_col" , self .phy_col ),
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- ("phy_crs" , self .phy_crs )
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- ],
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- clkport = "sys_clk" ,
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- rstport = "sys_rst"
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- )
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+ Instance .ClockPort ("sys_clk" ),
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+ Instance .ResetPort ("sys_rst" ),
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+
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+ Instance .Output ("rx_done_0" , self ._rx_event_0 .trigger ),
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+ Instance .Output ("rx_count_0" , self ._rx_count_0 .field .w ),
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+ Instance .Output ("rx_done_1" , self ._rx_event_1 .trigger ),
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+ Instance .Output ("rx_count_1" , self ._rx_count_1 .field .w ),
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+ Instance .Input ("rx_ready_0" , rx_ready_0 ),
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+ Instance .Input ("rx_ready_1" , rx_ready_1 ),
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+
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+ Instance .Input ("tx_start" , self ._tx_start .re ),
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+ Instance .Input ("tx_count" , self ._tx_count .field .r ),
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+ Instance .Output ("tx_done" , self ._tx_event .trigger ),
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+
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+ Instance .Input ("wb_adr_i" , self .membus .adr ),
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+ Instance .Input ("wb_dat_i" , self .membus .dat_w ),
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+ Instance .Input ("wb_sel_i" , self .membus .sel ),
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+ Instance .Input ("wb_stb_i" , self .membus .stb ),
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+ Instance .Input ("wb_cyc_i" , self .membus .cyc ),
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+ Instance .Input ("wb_we_i" , self .membus .we ),
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+ Instance .Output ("wb_dat_o" , self .membus .dat_r ),
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+ Instance .Output ("wb_ack_o" , self .membus .ack ),
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+
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+ Instance .Output ("phy_tx_data" , self .phy_tx_data ),
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+ Instance .Output ("phy_tx_en" , self .phy_tx_en ),
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+ Instance .Output ("phy_tx_er" , self .phy_tx_er ),
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+ Instance .Input ("phy_tx_clk" , self .phy_tx_clk ),
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+ Instance .Input ("phy_rx_clk" , self .phy_rx_clk ),
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+ Instance .Input ("phy_rx_data" , self .phy_rx_data ),
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+ Instance .Input ("phy_dv" , self .phy_dv ),
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+ Instance .Input ("phy_rx_er" , self .phy_rx_er ),
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+ Instance .Input ("phy_col" , self .phy_col ),
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+ Instance .Input ("phy_crs" , self .phy_crs ))
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]
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return Fragment (comb , sync , instances = inst ) \
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+ self .events .get_fragment () \
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