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Commit d65941d

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author
Sebastien Bourdeauducq
committedMar 22, 2013
dvisampler: channel synchronization
·
0.120.1
1 parent 515cdb2 commit d65941d

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5 files changed

+69
-5
lines changed

5 files changed

+69
-5
lines changed
 

‎milkymist/dvisampler/__init__.py

+10
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
from milkymist.dvisampler.clocking import Clocking
77
from milkymist.dvisampler.datacapture import DataCapture
88
from milkymist.dvisampler.charsync import CharSync
9+
from milkymist.dvisampler.chansync import ChanSync
910

1011
class DVISampler(Module, AutoReg):
1112
def __init__(self, inversions=""):
@@ -34,3 +35,12 @@ def __init__(self, inversions=""):
3435
charsync = CharSync()
3536
setattr(self.submodules, name + "_charsync", charsync)
3637
self.comb += charsync.raw_data.eq(cap.d)
38+
39+
self.submodules.chansync = ChanSync()
40+
self.comb += [
41+
self.chansync.char_synced.eq(self.data0_charsync.synced & \
42+
self.data1_charsync.synced & self.data2_charsync.synced),
43+
self.chansync.data_in0.eq(self.data0_charsync.data),
44+
self.chansync.data_in1.eq(self.data1_charsync.data),
45+
self.chansync.data_in2.eq(self.data2_charsync.data),
46+
]

‎milkymist/dvisampler/chansync.py

+51
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,51 @@
1+
from migen.fhdl.structure import *
2+
from migen.fhdl.module import Module
3+
from migen.genlib.cdc import MultiReg
4+
from migen.genlib.fifo import SyncFIFO
5+
from migen.genlib.misc import optree
6+
from migen.bank.description import *
7+
8+
_control_tokens = [0b1101010100, 0b0010101011, 0b0101010100, 0b1010101011]
9+
10+
class ChanSync(Module, AutoReg):
11+
def __init__(self, nchan=3, depth=8):
12+
self.char_synced = Signal()
13+
self.chan_synced = Signal()
14+
15+
self._r_channels_synced = RegisterField(1, READ_ONLY, WRITE_ONLY)
16+
17+
lst_control_starts = []
18+
all_control_starts = Signal()
19+
for i in range(nchan):
20+
name = "data_in" + str(i)
21+
data_in = Signal(10, name=name)
22+
setattr(self, name, data_in)
23+
name = "data_out" + str(i)
24+
data_out = Signal(10, name=name)
25+
setattr(self, name, data_out)
26+
27+
###
28+
29+
fifo = SyncFIFO(10, depth)
30+
self.add_submodule(fifo, "pix")
31+
self.comb += [
32+
fifo.we.eq(self.char_synced),
33+
fifo.din.eq(data_in),
34+
data_out.eq(fifo.dout)
35+
]
36+
is_control = Signal()
37+
is_control_r = Signal()
38+
self.sync.pix += If(fifo.re, is_control_r.eq(is_control))
39+
control_starts = Signal()
40+
self.comb += [
41+
is_control.eq(optree("|", [data_out == t for t in _control_tokens])),
42+
control_starts.eq(is_control & ~is_control_r),
43+
fifo.re.eq(~is_control | all_control_starts)
44+
]
45+
lst_control_starts.append(control_starts)
46+
47+
self.comb += all_control_starts.eq(optree("&", lst_control_starts))
48+
self.sync.pix += If(~self.char_synced,
49+
self.chan_synced.eq(0)
50+
).Elif(all_control_starts, self.chan_synced.eq(1))
51+
self.specials += MultiReg(self.chan_synced, self._r_channels_synced.field.w)

‎milkymist/dvisampler/charsync.py

+3-3
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
class CharSync(Module, AutoReg):
1010
def __init__(self, required_controls=8):
1111
self.raw_data = Signal(10)
12-
self.char_synced = Signal()
12+
self.synced = Signal()
1313
self.data = Signal(10)
1414

1515
self._r_char_synced = RegisterField(1, READ_ONLY, WRITE_ONLY)
@@ -36,7 +36,7 @@ def __init__(self, required_controls=8):
3636
If(found_control & (control_position == previous_control_position),
3737
If(control_counter == (required_controls - 1),
3838
control_counter.eq(0),
39-
self.char_synced.eq(1),
39+
self.synced.eq(1),
4040
word_sel.eq(control_position)
4141
).Else(
4242
control_counter.eq(control_counter + 1)
@@ -46,6 +46,6 @@ def __init__(self, required_controls=8):
4646
),
4747
previous_control_position.eq(control_position)
4848
]
49-
self.specials += MultiReg(self.char_synced, self._r_char_synced.field.w)
49+
self.specials += MultiReg(self.synced, self._r_char_synced.field.w)
5050

5151
self.sync.pix += self.data.eq(raw >> word_sel)

‎software/include/hw/dvisampler.h

+2
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,8 @@
2727
#define CSR_DVISAMPLER0_D2_PHASE_RESET DVISAMPLER0_CSR(0x3C)
2828
#define CSR_DVISAMPLER0_D2_CHAR_SYNCED DVISAMPLER0_CSR(0x40)
2929

30+
#define CSR_DVISAMPLER0_CHAN_SYNCED DVISAMPLER0_CSR(0x44)
31+
3032
#define DVISAMPLER_DELAY_CAL 0x01
3133
#define DVISAMPLER_DELAY_RST 0x02
3234
#define DVISAMPLER_DELAY_INC 0x04

‎software/videomixer/main.c

+3-2
Original file line numberDiff line numberDiff line change
@@ -60,10 +60,11 @@ static void adjust_phase(void)
6060
CSR_DVISAMPLER0_D2_PHASE_RESET = 1;
6161
break;
6262
}
63-
printf("Ph: %4d %4d %4d // %d%d%d\n", d0, d1, d2,
63+
printf("Ph: %4d %4d %4d // %d%d%d // %d\n", d0, d1, d2,
6464
CSR_DVISAMPLER0_D0_CHAR_SYNCED,
6565
CSR_DVISAMPLER0_D1_CHAR_SYNCED,
66-
CSR_DVISAMPLER0_D2_CHAR_SYNCED);
66+
CSR_DVISAMPLER0_D2_CHAR_SYNCED,
67+
CSR_DVISAMPLER0_CHAN_SYNCED);
6768
}
6869

6970
static void vmix(void)

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