genlib/cdc/MultiReg: output clock domain defaults to sys

m-labs · Mar 21, 2013 · a94bf3b · a94bf3b
1 parent b38818e
commit a94bf3b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/migen/genlib/cdc.py b/migen/genlib/cdc.py
@@ -23,7 +23,7 @@ def get_fragment(self):
 		return Fragment(comb, {self.odomain: o_sync})
 
 class MultiReg(Special):
-	def __init__(self, i, o, odomain, n=2):
+	def __init__(self, i, o, odomain="sys", n=2):
 		Special.__init__(self)
 		self.i = i
 		self.o = o