Skip to content
Permalink

Comparing changes

Choose two branches to see what’s changed or to start a new pull request. If you need to, you can also or learn more about diff comparisons.

Open a pull request

Create a new pull request by comparing changes across two branches. If you need to, you can also . Learn more about diff comparisons here.
base repository: m-labs/misoc
Failed to load repositories. Confirm that selected base ref is valid, then try again.
Loading
base: 7b2110284914
Choose a base ref
...
head repository: m-labs/misoc
Failed to load repositories. Confirm that selected head ref is valid, then try again.
Loading
compare: deb438ca184c
Choose a head ref
  • 3 commits
  • 5 files changed
  • 2 contributors

Commits on Aug 26, 2013

  1. tb/lasmicon: update simu

    enjoy-digital authored and Sebastien Bourdeauducq committed Aug 26, 2013
    Copy the full SHA
    7acd834 View commit details
  2. lasmicon: remove limitations on the number of phases

    enjoy-digital authored and Sebastien Bourdeauducq committed Aug 26, 2013
    Copy the full SHA
    d1dddad View commit details
  3. lasmicon/multiplexer/steerer_sel: replace STEER_ with string

    Sebastien Bourdeauducq committed Aug 26, 2013
    Copy the full SHA
    deb438c View commit details
Showing with 51 additions and 18 deletions.
  1. +5 −2 milkymist/lasmicon/__init__.py
  2. +4 −1 milkymist/lasmicon/bankmachine.py
  3. +33 −10 milkymist/lasmicon/multiplexer.py
  4. +2 −0 milkymist/s6ddrphy/__init__.py
  5. +7 −5 tb/lasmicon/common.py
7 changes: 5 additions & 2 deletions milkymist/lasmicon/__init__.py
Original file line number Diff line number Diff line change
@@ -7,7 +7,7 @@
from milkymist.lasmicon.bankmachine import *
from milkymist.lasmicon.multiplexer import *

PhySettings = namedtuple("PhySettings", "memtype dfi_d nphases rdphase wrphase cl read_latency write_latency")
PhySettings = namedtuple("PhySettings", "memtype dfi_d nphases rdphase wrphase rdcmdphase wrcmdphase cl read_latency write_latency")

class GeomSettings(namedtuple("_GeomSettings", "bank_a row_a col_a")):
def __init__(self, *args, **kwargs):
@@ -18,7 +18,10 @@ def __init__(self, *args, **kwargs):

class LASMIcon(Module):
def __init__(self, phy_settings, geom_settings, timing_settings):
burst_length = phy_settings.nphases*2 # command multiplication*DDR
if phy_settings.memtype in ["SDR"]:
burst_length = phy_settings.nphases*1 # command multiplication*SDR
elif phy_settings.memtype in ["DDR", "LPDDR", "DDR2", "DDR3"]:
burst_length = phy_settings.nphases*2 # command multiplication*DDR
address_align = log2_int(burst_length)

self.dfi = dfi.Interface(geom_settings.mux_a,
5 changes: 4 additions & 1 deletion milkymist/lasmicon/bankmachine.py
Original file line number Diff line number Diff line change
@@ -122,19 +122,22 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
self.cmd.stb.eq(1),
If(self.cmd.ack, NextState("TRP")),
self.cmd.ras_n.eq(0),
self.cmd.we_n.eq(0)
self.cmd.we_n.eq(0),
self.cmd.is_cmd.eq(1)
)
)
fsm.act("ACTIVATE",
s_row_adr.eq(1),
track_open.eq(1),
self.cmd.stb.eq(1),
self.cmd.is_cmd.eq(1),
If(self.cmd.ack, NextState("TRCD")),
self.cmd.ras_n.eq(0)
)
fsm.act("REFRESH",
self.refresh_gnt.eq(precharge_ok),
track_close.eq(1),
self.cmd.is_cmd.eq(1),
If(~self.refresh_req, NextState("REGULAR"))
)
fsm.delayed_enter("TRP", "ACTIVATE", timing_settings.tRP-1)
43 changes: 33 additions & 10 deletions milkymist/lasmicon/multiplexer.py
Original file line number Diff line number Diff line change
@@ -19,13 +19,15 @@ def __init__(self, a, ba):
CommandRequest.__init__(self, a, ba)
self.stb = Signal()
self.ack = Signal()
self.is_cmd = Signal()
self.is_read = Signal()
self.is_write = Signal()

class _CommandChooser(Module):
def __init__(self, requests):
self.want_reads = Signal()
self.want_writes = Signal()
self.want_cmds = Signal()
# NB: cas_n/ras_n/we_n are 1 when stb is inactive
self.cmd = CommandRequestRW(flen(requests[0].a), flen(requests[0].ba))

@@ -34,21 +36,21 @@ def __init__(self, requests):
rr = RoundRobin(len(requests), SP_CE)
self.submodules += rr

self.comb += [rr.request[i].eq(req.stb & ((req.is_read == self.want_reads) | (req.is_write == self.want_writes)))
self.comb += [rr.request[i].eq(req.stb & ((req.is_cmd & self.want_cmds) | ((req.is_read == self.want_reads) | (req.is_write == self.want_writes))))
for i, req in enumerate(requests)]

stb = Signal()
self.comb += stb.eq(Array(req.stb for req in requests)[rr.grant])
for name in ["a", "ba", "is_read", "is_write"]:
for name in ["a", "ba", "is_read", "is_write", "is_cmd"]:
choices = Array(getattr(req, name) for req in requests)
self.comb += getattr(self.cmd, name).eq(choices[rr.grant])
for name in ["cas_n", "ras_n", "we_n"]:
# we should only assert those signals when stb is 1
choices = Array(getattr(req, name) for req in requests)
self.comb += If(self.cmd.stb, getattr(self.cmd, name).eq(choices[rr.grant]))
self.comb += self.cmd.stb.eq(stb \
& (self.cmd.is_read == self.want_reads) \
& (self.cmd.is_write == self.want_writes))
& ((self.cmd.is_cmd & self.want_cmds) | ((self.cmd.is_read == self.want_reads) \
& (self.cmd.is_write == self.want_writes))))

self.comb += [If(self.cmd.stb & self.cmd.ack & (rr.grant == i), req.ack.eq(1))
for i, req in enumerate(requests)]
@@ -85,8 +87,6 @@ def stb_and(cmd, attr):
class Multiplexer(Module, AutoCSR):
def __init__(self, phy_settings, geom_settings, timing_settings, bank_machines, refresher, dfi, lasmic):
assert(phy_settings.nphases == len(dfi.phases))
if phy_settings.nphases != 2:
raise NotImplementedError("TODO: multiplexer only supports 2 phases")

# Command choosing
requests = [bm.cmd for bm in bank_machines]
@@ -96,6 +96,11 @@ def __init__(self, phy_settings, geom_settings, timing_settings, bank_machines,
choose_cmd.want_reads.eq(0),
choose_cmd.want_writes.eq(0)
]
if phy_settings.nphases == 1:
self.comb += [
choose_cmd.want_cmds.eq(1),
choose_req.want_cmds.eq(1)
]
self.submodules += choose_cmd, choose_req

# Command steering
@@ -149,13 +154,32 @@ def anti_starvation(timeout):
# Control FSM
fsm = FSM()
self.submodules += fsm

def steerer_sel(steerer, phy_settings, r_w_n):
r = []
for i in range(phy_settings.nphases):
s = steerer.sel[i].eq(STEER_NOP)
if r_w_n == "read":
if i == phy_settings.rdphase:
s = steerer.sel[i].eq(STEER_REQ)
elif i == phy_settings.wrcmdphase:
s = steerer.sel[i].eq(STEER_CMD)
elif r_w_n == "write":
if i == phy_settings.wrphase:
s = steerer.sel[i].eq(STEER_REQ)
elif i == phy_settings.rdcmdphase:
s = steerer.sel[i].eq(STEER_CMD)
else:
raise ValueError
r.append(s)
return r

fsm.act("READ",
read_time_en.eq(1),
choose_req.want_reads.eq(1),
choose_cmd.cmd.ack.eq(1),
choose_req.cmd.ack.eq(1),
steerer.sel[1-phy_settings.rdphase].eq(STEER_CMD),
steerer.sel[phy_settings.rdphase].eq(STEER_REQ),
steerer_sel(steerer, phy_settings, "read"),
If(write_available,
# TODO: switch only after several cycles of ~read_available?
If(~read_available | max_read_time, NextState("RTW"))
@@ -167,8 +191,7 @@ def anti_starvation(timeout):
choose_req.want_writes.eq(1),
choose_cmd.cmd.ack.eq(1),
choose_req.cmd.ack.eq(1),
steerer.sel[1-phy_settings.wrphase].eq(STEER_CMD),
steerer.sel[phy_settings.wrphase].eq(STEER_REQ),
steerer_sel(steerer, phy_settings, "write"),
If(read_available,
If(~write_available | max_write_time, NextState("WTR"))
),
2 changes: 2 additions & 0 deletions milkymist/s6ddrphy/__init__.py
Original file line number Diff line number Diff line change
@@ -43,6 +43,8 @@ def __init__(self, pads, memtype, nphases, cl, bitslip):
nphases=nphases,
rdphase=0,
wrphase=1,
rdcmdphase=1,
wrcmdphase=0,
cl=cl,
read_latency=5,
write_latency=0
12 changes: 7 additions & 5 deletions tb/lasmicon/common.py
Original file line number Diff line number Diff line change
@@ -16,13 +16,18 @@ def ns(t, margin=True):
return ceil(t/clk_period_ns)

sdram_phy = lasmicon.PhySettings(
type="DDR",
memtype="DDR",
dfi_d=64,
nphases=2,
rdphase=0,
wrphase=1,
cl=3
rdcmdphase=1,
wrcmdphase=0,
cl=3,
read_latency=5,
write_latency=0
)

sdram_geom = lasmicon.GeomSettings(
bank_a=2,
row_a=13,
@@ -36,9 +41,6 @@ def ns(t, margin=True):
tREFI=ns(7800, False),
tRFC=ns(70),

read_latency=5,
write_latency=0,

req_queue_size=8,
read_time=32,
write_time=16