dvisampler/clocking: insert DCM_CLKGEN before PLL

m-labs · Apr 14, 2013 · 8914969 · 8914969
1 parent f833bc9
commit 8914969
Showing 1 changed file with 15 additions and 2 deletions.
diff --git a/milkymist/dvisampler/clocking.py b/milkymist/dvisampler/clocking.py
@@ -18,6 +18,19 @@ def __init__(self, pads):
 
 		###
 
+		clk_dejitter = Signal()
+		dcm_locked = Signal()
+		self.specials += Instance("DCM_CLKGEN",
+			Instance.Parameter("CLKIN_PERIOD", 26.7),
+			Instance.Parameter("CLKFX_DIVIDE", 2),
+			Instance.Parameter("CLKFX_MULTIPLY", 2),
+			Instance.Parameter("CLKFX_MD_MAX", 1.0),
+			Instance.Input("CLKIN", pads.clk),
+			Instance.Input("RST", self._r_pll_reset.storage),
+			Instance.Output("CLKFX", clk_dejitter),
+			Instance.Output("LOCKED", dcm_locked)
+		)
+
 		clkfbout = Signal()
 		pll_locked = Signal()
 		pll_clk0 = Signal()
@@ -41,8 +54,8 @@ def __init__(self, pads):
 			Instance.Output("CLKOUT3", pll_clk3),
 			Instance.Output("LOCKED", pll_locked),
 			Instance.Input("CLKFBIN", clkfbout),
-			Instance.Input("CLKIN", pads.clk),
-			Instance.Input("RST", self._r_pll_reset.storage)
+			Instance.Input("CLKIN", clk_dejitter),
+			Instance.Input("RST", ~dcm_locked)
 		)
 
 		locked_async = Signal()