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patches/resources/0010-capes-LCD7-Fix-definitions.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,110 @@ | ||
| From b5bb1fd3ec41b03e223601e4f9b6fc3ee2e40f99 Mon Sep 17 00:00:00 2001 | ||
| From: Pantelis Antoniou <panto@antoniou-consulting.com> | ||
| Date: Wed, 12 Jun 2013 21:02:20 +0300 | ||
| Subject: [PATCH 10/12] capes: LCD7: Fix definitions | ||
|
|
||
| LCD7 rev A3/A4 had some pins wrong | ||
| --- | ||
| firmware/capes/BB-BONE-LCD7-01-00A3.dts | 8 ++++---- | ||
| firmware/capes/BB-BONE-LCD7-01-00A4.dts | 11 ++++++----- | ||
| 2 files changed, 10 insertions(+), 9 deletions(-) | ||
|
|
||
| diff --git a/firmware/capes/BB-BONE-LCD7-01-00A3.dts b/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| index abdcf3b..1ea4908 100644 | ||
| --- a/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| +++ b/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| @@ -38,7 +38,7 @@ | ||
| "P8.29", /* lcd: lcd_hsync */ | ||
| "P8.28", /* lcd: lcd_pclk */ | ||
| "P8.30", /* lcd: lcd_ac_bias_en */ | ||
| - "P8.20", /* lcd: gpio1_31 */ | ||
| + "P9.22", /* lcd: gpio0_2 */ | ||
| "P9.12", /* led: gpio1_28 */ | ||
| "P9.14", /* pwm: ehrpwm1a */ | ||
| "P9.15", /* keys: gpio1_16 */ | ||
| @@ -47,7 +47,7 @@ | ||
| "P9.30", /* keys: gpio3_16 */ | ||
| "P9.21", /* keys: gpio0_3 */ | ||
| /* the hardware IP uses */ | ||
| - "gpio1_31", | ||
| + "gpio0_2", | ||
| "gpio1_28", | ||
| "gpio1_16", | ||
| "gpio1_17", | ||
| @@ -75,7 +75,7 @@ | ||
|
|
||
| bone_lcd7_cape_lcd_pins: pinmux_bone_lcd7_cape_lcd_pins { | ||
| pinctrl-single,pins = < | ||
| - 0x84 0x07 /* gpmc_csn2.gpio1_31, OUTPUT | MODE7 - AVDD_EN */ | ||
| + 0x150 0x07 /* spi0_sclk.gpio0_2, OUTPUT | MODE7 - AVDD_EN */ | ||
| 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| 0xa3 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| @@ -275,7 +275,7 @@ | ||
| interrupt-parent = <&intc>; | ||
| interrupts = <36>; | ||
| ti,hwmods = "lcdc"; | ||
| - ti,power-gpio = <&gpio2 31 0x0>; | ||
| + ti,power-gpio = <&gpio1 2 0x0>; | ||
| ti,allow-non-reduced-blanking-modes; | ||
| }; | ||
|
|
||
| diff --git a/firmware/capes/BB-BONE-LCD7-01-00A4.dts b/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| index 81553e6..0c3abff 100644 | ||
| --- a/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| +++ b/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| @@ -38,7 +38,7 @@ | ||
| "P8.29", /* lcd: lcd_hsync */ | ||
| "P8.28", /* lcd: lcd_pclk */ | ||
| "P8.30", /* lcd: lcd_ac_bias_en */ | ||
| - "P8.20", /* lcd: gpio1_31 */ | ||
| + "P9.22", /* lcd: gpio0_2 */ | ||
| "P9.12", /* led: gpio1_28 */ | ||
| "P9.14", /* pwm: ehrpwm1a */ | ||
| "P9.15", /* keys: gpio1_16 */ | ||
| @@ -46,13 +46,15 @@ | ||
| "P9.16", /* keys: gpio1_19 */ | ||
| "P9.30", /* keys: gpio3_16 */ | ||
| "P9.21", /* keys: gpio0_3 */ | ||
| + "P9.27", /* captouch: gpio3_19 */ | ||
| /* the hardware IP uses */ | ||
| - "gpio1_31", | ||
| + "gpio0_2", | ||
| "gpio1_28", | ||
| "gpio1_16", | ||
| "gpio1_17", | ||
| "gpio1_19", | ||
| "gpio3_16", | ||
| + "gpio3_19", | ||
| "gpio0_3", | ||
| "lcd", | ||
| "ehrpwm1a"; | ||
| @@ -75,7 +77,7 @@ | ||
|
|
||
| bone_lcd7_cape_lcd_pins: pinmux_bone_lcd7_cape_lcd_pins { | ||
| pinctrl-single,pins = < | ||
| - 0x84 0x07 /* gpmc_csn2.gpio1_31, OUTPUT | MODE7 - AVDD_EN */ | ||
| + 0x150 0x07 /* spi0_sclk.gpio0_2, OUTPUT | MODE7 - AVDD_EN */ | ||
| 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ | ||
| @@ -255,7 +257,7 @@ | ||
| interrupt-parent = <&intc>; | ||
| interrupts = <36>; | ||
| ti,hwmods = "lcdc"; | ||
| - ti,power-gpio = <&gpio2 31 0x0>; | ||
| + ti,power-gpio = <&gpio1 2 0x0>; | ||
| ti,allow-non-reduced-blanking-modes; | ||
| }; | ||
|
|
||
| @@ -277,7 +279,6 @@ | ||
| interrupts = <19 0x0>; | ||
| atmel,irq-gpio = <&gpio4 19 0>; | ||
| }; | ||
| - | ||
| }; | ||
| }; | ||
| }; | ||
| -- | ||
| 1.8.1.4 | ||
|
|
41 changes: 41 additions & 0 deletions
41
patches/resources/0011-capes-LCD7-Fix-enter-key-pinmux.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,41 @@ | ||
| From 2e5021711aa1247282cd01e859383214b05b9b6b Mon Sep 17 00:00:00 2001 | ||
| From: Pantelis Antoniou <panto@antoniou-consulting.com> | ||
| Date: Wed, 12 Jun 2013 22:49:19 +0300 | ||
| Subject: [PATCH 11/12] capes: LCD7: Fix enter key pinmux | ||
|
|
||
| --- | ||
| firmware/capes/BB-BONE-LCD7-01-00A3.dts | 2 +- | ||
| firmware/capes/BB-BONE-LCD7-01-00A4.dts | 4 +++- | ||
| 2 files changed, 4 insertions(+), 2 deletions(-) | ||
|
|
||
| diff --git a/firmware/capes/BB-BONE-LCD7-01-00A3.dts b/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| index 1ea4908..a123152 100644 | ||
| --- a/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| +++ b/firmware/capes/BB-BONE-LCD7-01-00A3.dts | ||
| @@ -105,7 +105,7 @@ | ||
| 0x044 0x2f /* KEY_RIGHT gpmc_a1.gpio1_17, INPUT | PULLDIS | MODE7 */ | ||
| 0x04c 0x2f /* KEY_UP gpmc_a3.gpio1_19, INPUT | PULLDIS | MODE7 */ | ||
| 0x198 0x2f /* KEY_DOWN mcasp0_axr0.gpio3_16, INPUT | PULLDIS | MODE7 */ | ||
| - 0x070 0x2f /* KEY_ENTER gpmc_wait0.gpio0_3, INPUT | PULLDIS | MODE7 */ | ||
| + 0x154 0x2f /* KEY_ENTER spi0_d0.gpio0_3, INPUT | PULLDIS | MODE7 */ | ||
| >; | ||
| }; | ||
|
|
||
| diff --git a/firmware/capes/BB-BONE-LCD7-01-00A4.dts b/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| index 0c3abff..a23a809 100644 | ||
| --- a/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| +++ b/firmware/capes/BB-BONE-LCD7-01-00A4.dts | ||
| @@ -107,7 +107,9 @@ | ||
| 0x044 0x2f /* KEY_RIGHT gpmc_a1.gpio1_17, INPUT | PULLDIS | MODE7 */ | ||
| 0x04c 0x2f /* KEY_UP gpmc_a3.gpio1_19, INPUT | PULLDIS | MODE7 */ | ||
| 0x198 0x2f /* KEY_DOWN mcasp0_axr0.gpio3_16, INPUT | PULLDIS | MODE7 */ | ||
| - 0x070 0x2f /* KEY_ENTER gpmc_wait0.gpio0_3, INPUT | PULLDIS | MODE7 */ | ||
| + 0x154 0x2f /* KEY_ENTER spi0_d0.gpio0_3, INPUT | PULLDIS | MODE7 */ | ||
| + | ||
| + /* the next one should be in the tsc driver */ | ||
| 0x1a4 0x2f /* TSC_INTn mcasp0_fsr.gpio3_19, INPUT | PULLDIS | MODE7 */ | ||
| >; | ||
| }; | ||
| -- | ||
| 1.8.1.4 | ||
|
|
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,45 @@ | ||
| From bd7633cd1ab8ff1737bbca145f1d4a2b50463681 Mon Sep 17 00:00:00 2001 | ||
| From: David Anders <danders@circuitco.com> | ||
| Date: Thu, 13 Jun 2013 08:37:19 +0200 | ||
| Subject: [PATCH 12/12] Fix timings for LCD3 cape | ||
|
|
||
| In the 3.2 kernel using the da8xx lcdc fb, the HSW, HFP, and HBP are written to the lcdc registers directly as entered. i.e. if HSW=47 , then 47 is written to the register and the value that is generated is the register value plus one (total of 48 clocks). | ||
|
|
||
| with the 3.8 kernel using the DRM driver, the code subtracts one from the set value before writing it to the register, i.e. if HSW=47, then 46 is written to the register and the value that is generated is the register value plus one (total of 47 clocks). | ||
|
|
||
| specifically with the LCD3 board, the lcd panel does not use data enable as a timing signal. it specifically counts the number of vertical clocks and horizontal clocks to determine data start points. the lcd panel expects for the sum of the HSW and HBP to be 70 pixel clocks. currently it is 68. this is the root cause of the color shift and poor image quality.... | ||
|
|
||
| the HSW, HFP, and HBP for all three lcd panels needs to be incremented by one. | ||
| --- | ||
| firmware/capes/cape-bone-lcd3-00A2.dts | 9 +++++---- | ||
| 1 file changed, 5 insertions(+), 4 deletions(-) | ||
|
|
||
| diff --git a/firmware/capes/cape-bone-lcd3-00A2.dts b/firmware/capes/cape-bone-lcd3-00A2.dts | ||
| index 6728466..42fb692 100644 | ||
| --- a/firmware/capes/cape-bone-lcd3-00A2.dts | ||
| +++ b/firmware/capes/cape-bone-lcd3-00A2.dts | ||
| @@ -245,16 +245,17 @@ | ||
| sync-ctrl = <1>; | ||
| raster-order = <0>; | ||
| fifo-th = <0>; | ||
| + invert-pxl-clk; | ||
| }; | ||
| display-timings { | ||
| native-mode = <&timing0>; | ||
| timing0: 320x240 { | ||
| hactive = <320>; | ||
| vactive = <240>; | ||
| - hback-porch = <21>; | ||
| - hfront-porch = <58>; | ||
| - hsync-len = <47>; | ||
| - vback-porch = <11>; | ||
| + hback-porch = <22>; | ||
| + hfront-porch = <59>; | ||
| + hsync-len = <48>; | ||
| + vback-porch = <12>; | ||
| vfront-porch = <23>; | ||
| vsync-len = <2>; | ||
| clock-frequency = <8000000>; | ||
| -- | ||
| 1.8.1.4 | ||
|
|