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Commit a8f9d69

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committedOct 24, 2012
Make simulation silent when verbose mode is not activated
1 parent 7e76854 commit a8f9d69

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2 files changed

+15
-1
lines changed

2 files changed

+15
-1
lines changed
 

‎lm32_dcache.v

+4
Original file line numberDiff line numberDiff line change
@@ -765,7 +765,9 @@ always @(posedge clk_i `CFG_RESET_SENSITIVITY)
765765
begin
766766
if (rst_i == `TRUE)
767767
begin
768+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
768769
$display("DTLB STATE MACHINE RESET");
770+
`endif
769771
dtlb_flushing <= 1;
770772
dtlb_flush_set <= {addr_dtlb_index_width{1'b1}};
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dtlb_state <= `LM32_TLB_STATE_FLUSH;
@@ -783,7 +785,9 @@ begin
783785
if (dtlb_miss == `TRUE)
784786
begin
785787
dtlb_miss_addr <= address_m;
788+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
786789
$display("WARNING : DTLB MISS on addr 0x%08X at time %t", address_m, $time);
790+
`endif
787791
end
788792
if (csr_write_enable && csr_write_data[0])
789793
begin

‎lm32_icache.v

+11-1
Original file line numberDiff line numberDiff line change
@@ -792,7 +792,9 @@ begin
792792
begin
793793
if (eret_q_x)
794794
begin
795-
// $display("[%t] itlb_enabled <= 0x%08X upon eret", $time, csr_psw[`LM32_CSR_PSW_EITLBE]);
795+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
796+
$display("[%t] itlb_enabled <= 0x%08X upon eret", $time, csr_psw[`LM32_CSR_PSW_EITLBE]);
797+
`endif
796798
itlb_enabled <= csr_psw[`LM32_CSR_PSW_EITLBE];
797799
end
798800
else if (exception_x || in_exception)
@@ -808,21 +810,27 @@ begin
808810
begin
809811
if (exception_m)
810812
begin
813+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
811814
$display("[%t] pc_exception <= 0x%08X", $time, pc_m);
815+
`endif
812816
pc_exception <= pc_m;
813817
end
814818
if (pc_exception == pc_w)
815819
begin
816820
in_exception <= 0;
817821
end
818822
end
823+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
819824
$display("[%t] itlb_enabled <= 0x%08X upon exception", $time, 0);
825+
`endif
820826
itlb_enabled <= 0;
821827
end
822828
else
823829
begin
830+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
824831
if (itlb_enabled != csr_psw[`LM32_CSR_PSW_ITLBE])
825832
$display("[%t] itlb_enabled <= 0x%08X", $time, csr_psw[`LM32_CSR_PSW_ITLBE]);
833+
`endif
826834

827835
itlb_enabled <= csr_psw[`LM32_CSR_PSW_ITLBE];
828836
end
@@ -834,7 +842,9 @@ always @(posedge clk_i `CFG_RESET_SENSITIVITY)
834842
begin
835843
if (rst_i == `TRUE)
836844
begin
845+
`ifdef CFG_VERBOSE_DISPLAY_ENABLED
837846
$display("ITLB STATE MACHINE RESET");
847+
`endif
838848
itlb_flushing <= 1;
839849
itlb_flush_set <= {addr_itlb_index_width{1'b1}};
840850
itlb_state <= `LM32_TLB_STATE_FLUSH;

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