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Commit 3add962

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author
Sebastien Bourdeauducq
committedJul 6, 2012
framebuffer: switch to real DMA
1 parent ce82f18 commit 3add962

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-21
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‎milkymist/framebuffer/__init__.py

+1-21
Original file line numberDiff line numberDiff line change
@@ -207,25 +207,6 @@ def sim_fifo_gen():
207207
yield t
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print("H/V:" + str(t.value["hsync"]) + str(t.value["vsync"]))
209209

210-
class FakeDMA(Actor):
211-
def __init__(self, port):
212-
self.port = port
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super().__init__(
214-
("address", Sink, [("a", BV(self.port.hub.aw))]),
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("data", Source, [("d", BV(self.port.hub.dw))]))
216-
217-
def get_fragment(self):
218-
pixel = Signal(BV(32))
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comb = [
220-
self.endpoints["address"].ack.eq(1),
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self.endpoints["data"].stb.eq(1),
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self.token("data").d.eq(Replicate(pixel, 4))
223-
]
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sync = [
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If(self.endpoints["data"].ack, pixel.eq(pixel + 1))
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]
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return Fragment(comb, sync)
228-
229210
class Framebuffer:
230211
def __init__(self, address, asmiport, simulation=False):
231212
asmi_bits = asmiport.hub.aw
@@ -237,8 +218,7 @@ def __init__(self, address, asmiport, simulation=False):
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fi = ActorNode(_FrameInitiator(asmi_bits, length_bits, alignment_bits))
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adrloop = ActorNode(misc.IntSequence(length_bits, asmi_bits))
239220
adrbuffer = ActorNode(plumbing.Buffer)
240-
#dma = ActorNode(dma_asmi.SequentialReader(asmiport))
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dma = ActorNode(FakeDMA(asmiport))
221+
dma = ActorNode(dma_asmi.SequentialReader(asmiport))
242222
cast = ActorNode(structuring.Cast(asmiport.hub.dw, packed_pixels))
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unpack = ActorNode(structuring.Unpack(pack_factor, _pixel_layout))
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vtg = ActorNode(VTG())

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