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base repository: openrisc/mor1kx
base: 95be361ba63b
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head repository: openrisc/mor1kx
compare: bb96229ae093
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  • 9 commits
  • 6 files changed
  • 1 contributor

Commits on Nov 12, 2012

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  2. pronto espresso: rewrite fetch stage

    Reduce latency in fetch stage, also decode the instruction as it comes in and determine the address early if it's possible.
    
    Debug functionality not fully tested yet
    juliusbaxter committed Nov 12, 2012
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  3. pronto espresso: add "sleep" functionality

    On jump-to-self instructions the fetch unit will pause and not do anything else and signal to the control unit that it is not fetching anymore. PIC and tick timer exceptions will cause execution to continue
    juliusbaxter committed Nov 12, 2012
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  5. fetch_prontoespresso: fix fetch bug

    Bug which occurred when a bus burst finished on an instruction which was multicycle. The bus req was cancelled by the cycle-late execute_waiting_i which caused an invalid access on the wishbone bus via the mor1kx Wishbone bus interface
    juliusbaxter committed Nov 12, 2012
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  6. cpu_prontoespresso: fix RF snooping from monitor

    If we're writing to the RF the cycle you're snooping, the value won't be in the memory, so read it from the result net
    juliusbaxter committed Nov 12, 2012
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  7. lsu_espresso: add optional registering on espresso LSU signals

    Mainly the error signal, which created a path from the bus through to the control unit, and NPC on exception.
    Also break the path from the ALU out to the bus but not allowing that directly out to the bus.
    
    This is all optionally enabled with a parameter.
    juliusbaxter committed Nov 12, 2012
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