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2 files changed +6
-7
lines changed Original file line number Diff line number Diff line change @@ -69,7 +69,10 @@ def _get_args():
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top_class = target_module .default_subtarget
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if args .platform is None :
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- platform_name = top_class .default_platform
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+ if hasattr (top_class , "default_platform" ):
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+ platform_name = top_class .default_platform
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+ else :
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+ raise ValueError ("Target has no default platform, specify a platform with -p your_platform" )
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else :
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platform_name = args .platform
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platform_module = misoc_import ("mibuild.platforms" , external_platform , platform_name )
Original file line number Diff line number Diff line change @@ -18,17 +18,13 @@ def __init__(self, clk_in):
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]
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class SimpleSoC (GenSoC , IntegratedBIOS ):
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- default_platform = "de0nano" # /!\ Adapt this!
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- clk_name = "clk50" # /!\ Adapt this!
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- clk_freq = 50 * 1000000 # /!\ Adapt this!
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-
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def __init__ (self , platform ):
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GenSoC .__init__ (self , platform ,
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- clk_freq = self . clk_freq ,
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+ clk_freq = int (( 1 / ( platform . default_clk_period )) * 1000000000 ) ,
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cpu_reset_address = 0 )
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IntegratedBIOS .__init__ (self )
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- self .submodules .crg = _CRG (platform .request (self . clk_name ))
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+ self .submodules .crg = _CRG (platform .request (platform . default_clk_name ))
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# use on-board SRAM as SDRAM
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sys_ram_size = 16 * 1024
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