sram: do not use MemoryPort

m-labs · Nov 26, 2012 · 0620e75 · 0620e75
1 parent 0c29775
commit 0620e75
Showing 1 changed file with 11 additions and 9 deletions.
diff --git a/milkymist/sram/__init__.py b/milkymist/sram/__init__.py
@@ -7,21 +7,23 @@ def __init__(self, depth):
 		self.depth = depth
 
 	def get_fragment(self):
+		# memory
+		mem = Memory(32, self.depth)
+		port = mem.get_port(write_capable=True, we_granularity=8)
 		# generate write enable signal
-		we = Signal(BV(4))
-		comb = [we[i].eq(self.bus.cyc & self.bus.stb & self.bus.we & self.bus.sel[i])
+		comb = [port.we[i].eq(self.bus.cyc & self.bus.stb & self.bus.we & self.bus.sel[i])
 			for i in range(4)]
-		# split address
-		nbits = bits_for(self.depth-1)
-		partial_adr = Signal(BV(nbits))
-		comb.append(partial_adr.eq(self.bus.adr[:nbits]))
+		# address and data
+		comb += [
+			port.adr.eq(self.bus.adr[:len(port.adr)]),
+			port.dat_w.eq(self.bus.dat_w),
+			self.bus.dat_r.eq(port.dat_r)
+		]
 		# generate ack
 		sync = [
 			self.bus.ack.eq(0),
 			If(self.bus.cyc & self.bus.stb & ~self.bus.ack,
 				self.bus.ack.eq(1)
 			)
 		]
-		# memory
-		port = MemoryPort(partial_adr, self.bus.dat_r, we, self.bus.dat_w, we_granularity=8)
-		return Fragment(comb, sync, memories=[Memory(32, self.depth, port)])
+		return Fragment(comb, sync, memories=[mem])