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base repository: m-labs/misoc
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head repository: m-labs/misoc
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compare: e2463da7878f
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  • 3 commits
  • 1 file changed
  • 1 contributor

Commits on Jul 1, 2012

  1. framebuffer: fix pixel split

    Sebastien Bourdeauducq committed Jul 1, 2012
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    7bf5461 View commit details
  2. framebuffer/vtg: fix dataflow control (inc. WA for Migen bug - FIXME)

    Sebastien Bourdeauducq committed Jul 1, 2012
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    fc458a5 View commit details
  3. framebuffer: fake DMA for testing (WIP)

    Sebastien Bourdeauducq committed Jul 1, 2012
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    e2463da View commit details
Showing with 30 additions and 11 deletions.
  1. +30 −11 milkymist/framebuffer/__init__.py
41 changes: 30 additions & 11 deletions milkymist/framebuffer/__init__.py
Original file line number Diff line number Diff line change
@@ -110,23 +110,23 @@ def get_fragment(self):
hcounter = Signal(BV(_hbits))
vcounter = Signal(BV(_vbits))

skip = _bpc - _bpc_dac
comb = [
active.eq(hactive & vactive),
If(active,
self.token("dac").r.eq(self.token("pixels").r[:_bpc_dac]),
self.token("dac").g.eq(self.token("pixels").g[:_bpc_dac]),
self.token("dac").b.eq(self.token("pixels").b[:_bpc_dac])
self.token("dac").r.eq(self.token("pixels").r[skip:]),
self.token("dac").g.eq(self.token("pixels").g[skip:]),
self.token("dac").b.eq(self.token("pixels").b[skip:])
),

generate_en.eq(self.endpoints["timing"].stb & self.endpoints["dac"].ack \
& (~active | self.endpoints["pixels"].stb)),
generate_en.eq(self.endpoints["timing"].stb & (~active | self.endpoints["pixels"].stb)),
self.endpoints["pixels"].ack.eq(self.endpoints["dac"].ack & active),
self.endpoints["dac"].stb.eq(generate_en)
]
tp = self.token("timing")
sync = [
self.endpoints["timing"].ack.eq(0),
If(generate_en,
If(generate_en & self.endpoints["dac"].ack,
hcounter.eq(hcounter + 1),

If(hcounter == 0, hactive.eq(1)),
@@ -137,6 +137,8 @@ def get_fragment(self):
hcounter.eq(0),
If(vcounter == tp.vscan,
vcounter.eq(0)
# FIXME: work around Flow bug
#self.endpoints["timing"].ack.eq(1)
).Else(
vcounter.eq(vcounter + 1)
)
@@ -145,10 +147,7 @@ def get_fragment(self):
If(vcounter == 0, vactive.eq(1)),
If(vcounter == tp.vres, vactive.eq(0)),
If(vcounter == tp.vsync_start, self.token("dac").vsync.eq(1)),
If(vcounter == tp.vsync_end,
self.token("dac").vsync.eq(0),
self.endpoints["timing"].ack.eq(1)
)
If(vcounter == tp.vsync_end, self.token("dac").vsync.eq(0))
)
]

@@ -202,6 +201,25 @@ def get_fragment(self):
],
instances=[asfifo])

class FakeDMA(Actor):
def __init__(self, port):
self.port = port
super().__init__(
("address", Sink, [("a", BV(self.port.hub.aw))]),
("data", Source, [("d", BV(self.port.hub.dw))]))

def get_fragment(self):
pixel = Signal(BV(32))
comb = [
self.endpoints["address"].ack.eq(1),
self.endpoints["data"].stb.eq(1),
self.token("data").d.eq(Replicate(pixel, 4))
]
sync = [
If(self.endpoints["data"].ack, pixel.eq(pixel + 1))
]
return Fragment(comb, sync)

class Framebuffer:
def __init__(self, address, asmiport):
asmi_bits = asmiport.hub.aw
@@ -214,7 +232,8 @@ def __init__(self, address, asmiport):
adrloop = ActorNode(misc.IntSequence(length_bits))
adrbase = ActorNode(ala.Add(BV(asmi_bits)))
adrbuffer = ActorNode(plumbing.Buffer)
dma = ActorNode(dma_asmi.SequentialReader(asmiport))
#dma = ActorNode(dma_asmi.SequentialReader(asmiport))
dma = ActorNode(FakeDMA(asmiport))
cast = ActorNode(structuring.Cast(asmiport.hub.dw, packed_pixels))
unpack = ActorNode(structuring.Unpack(pack_factor, _pixel_layout))
vtg = ActorNode(VTG())